{"id":21358,"date":"2019-12-03T11:56:18","date_gmt":"2019-12-03T10:56:18","guid":{"rendered":"http:\/\/blog.netspark.de\/?p=21358"},"modified":"2019-11-29T12:23:55","modified_gmt":"2019-11-29T11:23:55","slug":"intel-emib-oficially-announced","status":"publish","type":"post","link":"https:\/\/blog.netspark.de\/?p=21358","title":{"rendered":"Intel EMIB oficially announced"},"content":{"rendered":"<p><a href=\"https:\/\/blog.netspark.de\/wp-content\/uploads\/2011\/11\/intel_new.png\"><img loading=\"lazy\" decoding=\"async\" class=\"alignleft  wp-image-1974\" src=\"https:\/\/blog.netspark.de\/wp-content\/uploads\/2011\/11\/intel_new-150x150.png\" alt=\"\" width=\"64\" height=\"64\" srcset=\"https:\/\/blog.netspark.de\/wp-content\/uploads\/2011\/11\/intel_new-150x150.png 150w, https:\/\/blog.netspark.de\/wp-content\/uploads\/2011\/11\/intel_new-480x480.png 480w, https:\/\/blog.netspark.de\/wp-content\/uploads\/2011\/11\/intel_new-64x64.png 64w, https:\/\/blog.netspark.de\/wp-content\/uploads\/2011\/11\/intel_new-24x24.png 24w, https:\/\/blog.netspark.de\/wp-content\/uploads\/2011\/11\/intel_new.png 556w\" sizes=\"auto, (max-width: 64px) 100vw, 64px\" \/><\/a>Intel has recently shown a close-shot of their EMIB,<br \/>\na part of processor-interconnection between multiple<br \/>\ndies. A tiny little pice of circuit plate, but important!<br \/>\nHence EMIB = Embedded Multi-Die Interconnect Bridge<\/p>\n<p><!--more-->This part interconnects multiple dies inside a CPU package to have, let&#8217;s say GPU and CPU speak together. Although this is nothing more than a rice-corn-sized piece of silicon, it still can handle tremendous amounts of data per second (we speak of gigabytes!).<\/p>\n<p>Intel\u2019s Ponte Vecchio processor, a general-purpose GPU the company unveiled on November 17<sup>th<\/sup>, contains EMIB silicon to allow fast data streams between the GPU and memory. The EMIB boosts speeds up to 80% compared to the former design, where an Interposer is used. An Interposer is something similar to the EMIB but all the components reside on one single circuit board and then communicating together. It can be imagined as miniature-sized <a href=\"https:\/\/en.wikipedia.org\/wiki\/Breadboard\" target=\"_blank\" rel=\"noopener noreferrer\">breadboard<\/a>.<\/p>\n<p>And this is what an EMIB looks like in a close shot (click to enlarge):<\/p>\n<div id=\"attachment_21359\" style=\"width: 639px\" class=\"wp-caption aligncenter\"><a href=\"https:\/\/blog.netspark.de\/wp-content\/uploads\/2019\/11\/Intel_EMIB-scaled.jpg\"><img loading=\"lazy\" decoding=\"async\" aria-describedby=\"caption-attachment-21359\" class=\"size-medium wp-image-21359\" src=\"https:\/\/blog.netspark.de\/wp-content\/uploads\/2019\/11\/Intel_EMIB-629x480.jpg\" alt=\"\" width=\"629\" height=\"480\" srcset=\"https:\/\/blog.netspark.de\/wp-content\/uploads\/2019\/11\/Intel_EMIB-629x480.jpg 629w, https:\/\/blog.netspark.de\/wp-content\/uploads\/2019\/11\/Intel_EMIB-1888x1440.jpg 1888w, https:\/\/blog.netspark.de\/wp-content\/uploads\/2019\/11\/Intel_EMIB-768x586.jpg 768w, https:\/\/blog.netspark.de\/wp-content\/uploads\/2019\/11\/Intel_EMIB-500x381.jpg 500w, https:\/\/blog.netspark.de\/wp-content\/uploads\/2019\/11\/Intel_EMIB-1536x1171.jpg 1536w, https:\/\/blog.netspark.de\/wp-content\/uploads\/2019\/11\/Intel_EMIB-2048x1562.jpg 2048w\" sizes=\"auto, (max-width: 629px) 100vw, 629px\" \/><\/a><p id=\"caption-attachment-21359\" class=\"wp-caption-text\">Intel\u2019s embedded multi-die interconnect bridge (EMIB) technology helps multiple chips \u2013 CPU, graphics, memory, IO and more \u2014 communicate. EMIB is a complex multi-layered sliver of silicon no bigger than a grain of Basmati rice that moves large quantities of data among adjoining chips. (Credit: Walden Kirsch\/Intel Corporation)<\/p><\/div>\n<p>&nbsp;<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Intel has recently shown a close-shot of their EMIB, a part of processor-interconnection between multiple dies. A tiny little pice of circuit plate, but important! Hence EMIB = Embedded Multi-Die Interconnect Bridge<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":""},"categories":[55,3,2949],"tags":[4189,4187,1565,178,3843,4190,4188],"class_list":["post-21358","post","type-post","status-publish","format-standard","hentry","category-computer-2","category-news","category-technology","tag-bridge","tag-emib","tag-high-speed","tag-intel","tag-interconnect","tag-micro-size","tag-multi-die"],"jetpack_featured_media_url":"","jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/blog.netspark.de\/index.php?rest_route=\/wp\/v2\/posts\/21358","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blog.netspark.de\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blog.netspark.de\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blog.netspark.de\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/blog.netspark.de\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=21358"}],"version-history":[{"count":0,"href":"https:\/\/blog.netspark.de\/index.php?rest_route=\/wp\/v2\/posts\/21358\/revisions"}],"wp:attachment":[{"href":"https:\/\/blog.netspark.de\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=21358"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blog.netspark.de\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=21358"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blog.netspark.de\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=21358"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}